Extending a Compiler Backend for Complete Memory Error Detection
| dc.contributor.author | Rink, Norman | |
| dc.contributor.author | Castrillon, Jeronimo | |
| dc.contributor.editor | Dencker, Peter | |
| dc.contributor.editor | Klenk, Herbert | |
| dc.contributor.editor | Keller, Hubert B. | |
| dc.contributor.editor | Plödererder, Erhard | |
| dc.date.accessioned | 2017-06-16T19:03:37Z | |
| dc.date.available | 2017-06-16T19:03:37Z | |
| dc.date.issued | 2017 | |
| dc.description.abstract | Technological advances drive hardware to ever smaller feature sizes, causing devices to become more vulnerable to faults. Applications can be protected against errors resulting from faults by adding error detection and recovery measures in software. This is popularly achieved by apply- ing automatic program transformations. However, transformations applied to intermediate program representations are fundamentally incapable of protecting against vulnerabilities that are introduced during compilation. In particular, the compiler backend may introduce additional memory accesses. This report presents an extended compiler backend that protects these accesses against faults in the memory system. It is demonstrated that this enables the detection of all single bit flips in memory. On a subset of SPEC CINT2006 the runtime overhead caused by the extended backend amounts to 1.50x for the 32-bit processor architecture i386, and 1.13x for the 64-bit architecture x86 64. | |
| dc.identifier.isbn | 978-3-88579-663-3 | |
| dc.identifier.pissn | 1617-5468 | |
| dc.language.iso | en | |
| dc.publisher | Gesellschaft für Informatik, Bonn | |
| dc.relation.ispartof | Automotive - Safety & Security 2017 - Sicherheit und Zuverlässigkeit für automobile Informationstechnik | |
| dc.relation.ispartofseries | Lecture Notes in Informatics (LNI) - Proceedings, Volume P-269 | |
| dc.subject | transient hardware faults | |
| dc.subject | soft errors | |
| dc.subject | memory errors | |
| dc.subject | error detection | |
| dc.subject | fault tolerance | |
| dc.subject | resilience | |
| dc.subject | compiler backend | |
| dc.subject | code generation | |
| dc.subject | intermediate representation (IR) | |
| dc.subject | LLVM | |
| dc.title | Extending a Compiler Backend for Complete Memory Error Detection | |
| dc.type | Text/Conference Paper | |
| gi.citation.endPage | 74 | |
| gi.citation.startPage | 61 | |
| gi.conference.date | 30.-31. Mai 2017 | |
| gi.conference.location | Stuttgart |
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