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Auflistung nach Autor:in "Herkersdorf, Andreas"

1 - 10 von 51
  • Konferenzbeitrag
    Achieving scalability for job centric monitoring in a distributed infrastructure
    (ARCS 2012 Workshops, 2012) Hilbrich, Marcus; Müller-Pfefferkorn, Ralph
    Job centric monitoring allows to observe jobs on remote computing resources. It may offer visualisation of recorded monitoring data and helps to find faulty or misbehaving jobs. If installations like grids or clouds are observed monitoring data of many thousands of jobs have to be handled. The challenge of job centric monitoring infrastructures is to store, search and access data collected in huge installations like grids or clouds. We take this challenge with a distributed layer based architecture which provides a uniform view to all monitoring data. The concept of this infrastructure called SLAte and an analysis of the scalability is provided in this paper.
  • Konferenzbeitrag
    Adaptive content distribution network for live and on-demand streaming
    (ARCS 2012 Workshops, 2012) Miyauchi, Yuta; Matsumoto, Noriko; Yoshida, Norihiko; Kamiya, Yuko; Shimokawa, Toshihiko
    We have proposed an adaptive content distribution network (CDN), FCAN (Flash Crowds Alleviation Network), which changes its structure dynamically against a flash crowd, that is a rapid increase in server load caused by a sudden access concentration. FCAN in our preceding studies responds only to static content delivery. In this paper, we extend FCAN to alleviate flash crowds in video streaming. Through some experiments, we confirmed that FCAN for video streaming is effective to alleviate flash crowds.
  • Konferenzbeitrag
    An anonymous efficient private set intersection protocol for wireless sensor networks
    (ARCS 2012 Workshops, 2012) Moldovan, George; Ignat, Anda
    We present an efficient protocol which, under certain assumptions, provides a suitable level of security and anonymity in the ideal cipher model when computing the intersection of two private data-sets containing lists of elements from a large domain. The assumptions are that each node is pre-loaded with a set of pseudonyms, signed by the network's trusted authority; that the cardinality of each data-set is globally known. Our protocol first establishes a secure, trusted connection between two partners, then uses lightweight, symmetrical key operations for encoding and privately comparing the elements of two sets. Given a cryptographically secure symmetric encryption scheme, our protocol is safe for both semi-honest and malicious adversaries. The primary target platform for this protocol are Wireless Sensor Networks (WSNs), specifically those used in Ambient Assisted Living (AAL) scenarios, which almost entirely consist of a heterogeneous mix of devices, providers and manufacturers.
  • Konferenzbeitrag
    An architecture for runtime evaluation of soc reliability
    (INFORMATIK 2006 – Informatik für Menschen, Band 1, 2006) Bernauer, Andreas; Bringmann, Oliver; Rosenstiel, Wolfgang; Bouajila, Abdelmajid; Stechele, Walter; Herkersdorf, Andreas
    This paper presents an architecture to evaluate the reliability of a systemon-chip (SoC) during its runtime that also accounts for the system's redundancy. We propose to integrate an autonomic layer into the SoC to detect the chip's current condition and instruct appropriate countermeasures. In the autonomic layer, error counters are used to count the number of errors within a fixed time interval. The counters' values accumulate into a global register representing the system's reliability. The accumulation takes into account the series and parallel composition of the system.
  • Editiertes Buch
    ARCS 2012 Workshops
    (2012)
  • Konferenzbeitrag
    ART networks as flexible means to implement dependability properties in autonomous systems
    (ARCS 2012 Workshops, 2012) Großpietsch, Karl-Erwin; Silayeva, Tanya A.
    In this paper, the potential of adaptive resonance theory (ART) networks for dependability issues is considered. The basic properties of ART architectures are described, and some strategies are discussed to enable a balanced combination of performance and dependability requirements by these networks.
  • Konferenzbeitrag
    Cellular location determination - reliability and trustworthiness of GSM location data
    (ARCS 2012 Workshops, 2012) Zahoransky, Richard M.; Rechert, Klaus; Meier, Konrad; Wehrle, Dennis; Suchodoletz, Dirk von
    While using mobile telephony networks, the serving network infrastructure is able to determine the mobile station's location. Until now, cellular telephony has been built on self-contained infrastructure, i.e. all network components have been certified and especially users have been unable to take over control over their mobile equipment's behavior. With the rising awareness on privacy issues, software-based mobile phone network stacks became available and thereby a new freedom degree for mobile subscribers is introduced. While slight modification to the mobile phones behavior will not impair with the general functionality of the network, cellular location determination becomes less reliable and trustworthy. We discuss user imposed measures to detect external location determination attempts and to obfuscate generated location information. With a dedicated testbed setup, the effects of location obfuscation were evaluated.
  • Konferenzbeitrag
    A comparison of parallel programming models of network processors
    (ARCS 2004 – Organic and pervasive computing, 2004) Albrecht, Carsten; Hagenau, Rainer; Maehle, Erik; Döring, Andreas; Herkersdorf, Andreas
    Today's network processor utilize parallel processing in order to cope with the traffic growth and wire-speed of current and future network technologies. In this paper, we study two important parallel programming models for network processors: run to completion and pipelining. In particular, the packet flow of a standard network application, IPv4 Forwarding, through two examined network processors, IBM PowerNP NP4GS3 and Intel IXP1200, is reviewed and characterized in respect to their programming models. Based on a benchmark for PC-cluster SANs, their application throughput and latency for Gigabit Ethernet is investigated and compared to a commercial, ASIC-based switch. It is shown that in this scenario network processors can compete with hard-wired solutions.
  • Konferenzbeitrag
    Concurrent phase classification for accelerating MPSoC simulation
    (ARCS 2012 Workshops, 2012) Tawk, Melhem; Ibrahim, Khaled Z.; Niar, Smail
    To rapidly evaluate performances and power consumption in design space exploration of modern highly complex embedded systems, new simulation tools are needed. The checkpointing technique, which consists in saving system states in order to simulate in detail only a small part of the application, is among the most viable simulation approaches. In this paper, a new method for generating and storing checkpoints for accelerating MPSoC simulation is presented. Experimental results demonstrate that our technic can reduce simulation time and the memory size required to store these checkpoints on a secondary memory. In addition, the necessary time to load checkpoints on the host processor at runtime is optimized. These advantages speedup simulations and allow exploration of a large space of alternative designs in the DSE.
  • Konferenzbeitrag
    Correction of faulty signal transmission for resilient designs of signed-digit arithmetic
    (ARCS 2012 Workshops, 2012) Neuhäuser, David; Zehendner, Eberhard
    When arithmetic components are parallelized, fault-prone interconnections can tamper results significantly. Advances in feature size shrinking lead to a steady increase of errors caused by faulty transmission. We suggest to employ resilient data encoding schemes to offset these negative effects. Focusing on parallel signed-digit based arithmetic, frequently used in high-speed systems, we found that a suitable data encoding can reduce error rates by about 25% when using 2-bit encoding and about 62% when using 3-bit encoding. Data encoding should be driven by symbol occurrence probabilities. We develop a methodology to obtain these probabilities, show example fault-tolerant encodings, and discuss the impact on communicating parallel arithmetic circuits in example error scenarios.