Auflistung nach Autor:in "Wild, Thomas"
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- KonferenzbeitragEnhanced reliability in tiled manycore architectures through transparent task relocation(ARCS 2012 Workshops, 2012) Rauchfuss, Holm; Wild, Thomas; Herkersdorf, AndreasManycore platforms with tens and even up to hundreds of processing cores per chip are becoming a commercial reality and are subject of intensified research. This concept paper describes work in progress on the applicability of HW supported communication and processing virtualization on regular structured, tiled manycore architectures for the benefit of improved fault tolerance against transient and permanent perturbations. Temporarily unused, naturally redundant tiles are dynamically occupied during run time via transparent task relocation. This means, the execution of a task can pro-actively and transparently for the application be switched by distributed system management and virtualization services from a tile, which is considered unreliable, to a more reliable tile. In order to support different requirements regarding safety, timing integrity and minimized overhead for the relocation services, several established strategies can be enacted by the system management. The migration protocol for signaling during run configuration and actual relocation allows migration with minimal downtime and no communication loss. The actual migration is triggered by a configurable threshold on critical system parameters on a per task basis.
- KonferenzbeitragPotentials and challenges for multi-core processors in robotic applications(INFORMATIK 2013 – Informatik angepasst an Mensch, Organisation und Umwelt, 2013) Herkersdorf, Andreas; Paul, Johny; Kumar Pujari, Ravi; Stechele, Walter; Wallentowitz, Stefan; Wild, Thomas; Zaib, AurangMulti-core processors have shown to be superior to single-core with respect to performance and power efficiency. However, multi-core imposes additional challenges on system complexity and application programming. This paper reviews benefits and challenges of multi-core processors in embedded real-time applications like humanoid robotics. Selected approaches towards enabling multi-core processors are shown, covering multiple hardware / software abstraction levels, including isolation of individual applications, differentiated quality-of-service support, thread mpping, and resource-aware programming.