Browsing by Author "Teich, Jürgen"
Now showing items 1-8 of 8
-
Acceleration of Optical Flow Computations on Tightly-Coupled Processor Arrays
Sousa, Éricles Rodrigues; Tanase, Alexandru; Lari, Vahid; Hannig, Frank; Teich, Jürgen; Paul, Johny; Stechele, Walter; Kröhnert, Manfred; Asfour, Tamin
-
Acceleration of Optical Flow Computations on Tightly-Coupled Processor Arrays
Sousa, Éricles; Tanase, Alexandru; Lari, Vahid; Hannig, Frank; Teich, Jürgen; Paul, Johny; Stechele, Walter; Kröhnert, Manfred; Asfour, Tamin
80-89 -
A flexible reconfiguration manager for the Erlangen Slot Machine
Majer, Mateusz; Ahmadinia, Ali; Bobda, Christophe; Teich, Jürgen
183-194 -
Generation of distributed arithmetic designs for reconfigurable applications
Bobda, Christophe; Ahmadinia, Ali; Teich, Jürgen
205-214 -
Integration of FPGAs in Database Management Systems: Challenges and Opportunities
Becher, Andreas; B.G., Lekshmi; Broneske, David; Drewes, Tobias; Gurumurthy, Bala; Meyer-Wegener, Klaus; Pionteck, Thilo; Saake, Gunter; Teich, Jürgen; Wildermann, Stefan
145-156 -
Partial reconfiguration on FPGAs in practice – tools and applications
Koch, Dirk; Torresen, Jim; Beckhoff, Christian; Ziener, Daniel; Dennl, Christopher; Breuer, Volker; Teich, Jürgen; Feilen, Michael; Stechele, Walter
297-319 -
ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing
Becher, Andreas; Herrmann, Achim; Wildermann, Stefan; Teich, Jürgen
51-70 -
Self-organizing Core Allocation
Ziermann, Tobias; Wildermann, Stefan; Teich, Jürgen
90-101