Show simple item record

dc.contributor.authorBernauer, Andreas
dc.contributor.authorFritz, Dirk
dc.contributor.authorRosenstiel, Wolfgang
dc.contributor.editorHegering, Heinz-Gerd
dc.contributor.editorLehmann, Axel
dc.contributor.editorOhlbach, Hans Jürgen
dc.contributor.editorScheideler, Christian
dc.date.accessioned2019-04-03T12:45:23Z
dc.date.available2019-04-03T12:45:23Z
dc.date.issued2008
dc.identifier.isbn978-3-88579-228-4
dc.identifier.issn1617-5468
dc.identifier.urihttp://dl.gi.de/handle/20.500.12116/21282
dc.description.abstractIn this paper, we evaluate the feasibility of using the learning classifier XCS to control a System-on-Chip. Increasing number of transistors and process variation make it difficult for a chip designer to foresee all possible run-time conditions. Post-poning some decisions from design time to run time alleviates the designer’s life and allows shorter time-to-market. In this paper, we evaluate if XCS can take these run-time decisions on a processor with four cores. The evaluation shows that XCS can find optimal operating points, even in changed environments or with changed reward functions. This even works, though limited, without the genetic algorithm the XCS uses internally. The results motivate us to continue the evaluation for more complex setups.en
dc.language.isoen
dc.publisherGesellschaft für Informatik e. V.
dc.relation.ispartofINFORMATIK 2008. Beherrschbare Systeme - dank Informatik. Band 2
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-134
dc.titleEvaluation of the Learning Classifier System XCS for SoC run-time controlen
dc.typeText/Conference Paper
dc.pubPlaceBonn
mci.reference.pages763-770
mci.conference.sessiontitleRegular Research Papers
mci.conference.locationMünchen
mci.conference.date8.-13. September 2008


Files in this item

Thumbnail

Show simple item record