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dc.contributor.authorBreß, Sebastian
dc.contributor.authorFunke, Henning
dc.contributor.authorZeuch, Steffen
dc.contributor.authorRabl, Tilmann
dc.contributor.authorMarkl, Volker
dc.contributor.editorMeyer, Holger
dc.contributor.editorRitter, Norbert
dc.contributor.editorThor, Andreas
dc.contributor.editorNicklas, Daniela
dc.contributor.editorHeuer, Andreas
dc.contributor.editorKlettke, Meike
dc.date.accessioned2019-04-15T11:40:41Z
dc.date.available2019-04-15T11:40:41Z
dc.date.issued2019
dc.identifier.isbn978-3-88579-684-8
dc.identifier.issn1617-5468
dc.identifier.urihttp://dl.gi.de/handle/20.500.12116/21828
dc.description.abstractProcessor manufacturers build increasingly specialized processors to mitigate the effects of the power wall in order to deliver improved performance. Currently, database engines have to be manually optimized for each processor which is a costly and error prone process. In this paper, we provide a summary of our recent VLDB Journal publication, where we propose concepts to adapt to performance enhancements of modern processors and to exploit their capabilities automatically. Our key idea is to create processor-specific code variants and to learn a well-performing code variant for each processor. These code variants leverage various parallelization strategies and apply both generic and processor-specific code transformations. We observe that performance of code variants may diverge up to two orders of magnitude. Thus, we need to generate custom code for each processor for peak performance. Hawk automatically finds efficient code variants for CPUs, GPUs, and MICs.en
dc.language.isoen
dc.publisherGesellschaft für Informatik, Bonn
dc.relation.ispartofBTW 2019 – Workshopband
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) – Proceedings, Volume P-290
dc.titleAn Overview of Hawk: A Hardware-Tailored Code Generator for the Heterogeneous Many Core Ageen
mci.reference.pages87-90
mci.conference.sessiontitle1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC)
mci.conference.locationRostock
mci.conference.date4.-8. März 2019
dc.identifier.doi10.18420/btw2019-ws-07


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