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dc.contributor.authorSonntag, Sören
dc.contributor.authorGries, Matthias
dc.contributor.authorSauer, Christian
dc.contributor.editorCremers, Armin B.
dc.contributor.editorManthey, Rainer
dc.contributor.editorMartini, Peter
dc.contributor.editorSteinhage, Volker
dc.date.accessioned2019-10-11T07:41:19Z
dc.date.available2019-10-11T07:41:19Z
dc.date.issued2005
dc.identifier.isbn3-88579-396-2
dc.identifier.issn1617-5468
dc.identifier.urihttp://dl.gi.de/handle/20.500.12116/28051
dc.description.abstractModern VLSI systems exhibit increasing complexity. The size of a design not only grows, but the system architecture also becomes more and more heterogeneous and parallel. A key factor for a successful implementation is modeling and simulation of the design. However, modeling at register-transfer level (RTL) is not feasible anymore as a starting point. Already in the concept phase of a design quantitative estimations of the system's performance are required. To effectively support system engineers during this design phase we have developed a performance evaluation framework called SystemQ. By starting with a performance model we show how the system's behavior and structure can be refined systematically. SystemQ is implemented in SystemC and seamlessly supports the refinement of performance models down to transaction level and RTL.en
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V.
dc.relation.ispartofInformatk 2005. Informatik Live! Band 1
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-67
dc.titlePerformance evaluation of VLSI platforms using SystemQen
dc.typeText/Conference Paper
dc.pubPlaceBonn
mci.reference.pages319-323
mci.conference.sessiontitleRegular Research Papers
mci.conference.locationBonn
mci.conference.date19.-22. September 2005


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