|dc.description.abstract||The exponential growth of the transistor count on VLSI circuits, known as Moore’s law, is slowing down, and the end of the technology scaling is predicted to be inevitable. As a consequence, computing system architectures are gradually shifting toward extremely heterogeneous designs consisting of multiple different hardware devices or accelerators in each component. As one example, over the past few years the industry has begun to support hybrid memory systems in their products based on emerging memory device technologies, most prominently HBM (High-Bandwidth Memory) and NVRAM (Non-Volatile RAM). This hardware trend has opened up new research opportunities in the system software and operating system area.
In this position paper, we focus on data, power and process management in hybrid memory based systems, with a particular focus on a coordinated and dynamic approach. This is based on our key insight, which is brought by our prior studies, that the on such systems memory access/utilization behavior as well as the memory management policy plays an important role for various optimizations, including power management and process (or job) scheduling. In this position paper, we clarify the problem, provide a high-level software architecture, and finally discuss the major challenges to realize it.||en