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dc.contributor.authorUngethüm, Annett
dc.contributor.authorHabich, Dirk
dc.contributor.authorKarnagel, Tomas
dc.contributor.authorHaas, Sebastian
dc.contributor.authorMier, Eric
dc.contributor.authorFettweis, Gerhard
dc.contributor.authorLehner, Wolfgang
dc.contributor.editorMitschang, Bernhard
dc.contributor.editorNicklas, Daniela
dc.contributor.editorLeymann, Frank
dc.contributor.editorSchöning, Harald
dc.contributor.editorHerschel, Melanie
dc.contributor.editorTeubner, Jens
dc.contributor.editorHärder, Theo
dc.contributor.editorKopp, Oliver
dc.contributor.editorWieland, Matthias
dc.date.accessioned2017-06-20T20:24:31Z
dc.date.available2017-06-20T20:24:31Z
dc.date.issued2017
dc.identifier.isbn978-3-88579-659-6
dc.identifier.issn1617-5468
dc.description.abstractThe key objective of database systems is to e ciently manage an always increasing amount of data. Thereby, a high query throughput and a low query latency are core requirements. To satisfy these requirements, database engines are highly adapted to the given hardware by using all features of modern processors. Apart from this software optimization, even tailor-made processing circuits running on FGPAs are built to run mostly stateless query plans with a high throughput. A similar approach, which was already investigated three decades ago, is to build customized hardware like a database processor. Tailor-made hardware allows to achieve performance numbers that cannot be reached with software running on general-purpose CPUs, while at the same time, addressing the dark silicon problem. The main disadvantage of custom hardware is the high development cost that comes with designing and verifying a new processor, as well as building respective drivers and the software stack. However, there is actually no need to build a fully-fledged processor from scratch. In this paper, we present our conducted as well as our ongoing research e orts in the direction of customizing hardware for databases. In detail, we illustrate the potential of instruction set extensions of processors as well as of optimizing memory access by o oading logic to the main memory controller.en
dc.language.isoen
dc.publisherGesellschaft für Informatik, Bonn
dc.relation.ispartofDatenbanksysteme für Business, Technologie und Web (BTW 2017)
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-265
dc.titleOverview on Hardware Optimizations for Database Enginesen
dc.typeText/Conference Paper
mci.reference.pages383-402
mci.conference.sessiontitleScientific Data and Hardware
mci.conference.locationStuttgart
mci.conference.date6.-10. März 2017


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