An Architectural Template for Parallel Loops and Sections
| dc.contributor.author | Frank, Markus | |
| dc.contributor.author | Hakamian, Alireza | |
| dc.contributor.editor | Kelter, Udo | |
| dc.date.accessioned | 2023-02-27T13:46:47Z | |
| dc.date.available | 2023-02-27T13:46:47Z | |
| dc.date.issued | 2019 | |
| dc.description.abstract | The Palladio Component Model uses UML-like diagrams to specify architectural software designs, which are used for early design-time analyses of software performance metrics. As a current drawback of the PCM, it does not support the specification of massive parallel software behaviour like OpenMP parallel loops. For Software Performance Engineers this results in complex modelling workarounds, or it is not possible to model the software’s behaviour at all, which results in inaccurate analyses and semantic discrepancies. In this paper, we present a light-weight PCM metamodel extension, allowing SPEs to easily annotate parallel sections (similar to OpenMP) in their software specifications. This significantly reduces the modelling effort through automation. | en |
| dc.identifier.pissn | 0720-8928 | |
| dc.identifier.uri | https://dl.gi.de/handle/20.500.12116/40477 | |
| dc.language.iso | en | |
| dc.publisher | Gesellschaft für Informatik e.V. | |
| dc.relation.ispartof | Softwaretechnik-Trends Band 39, Heft 3 | |
| dc.relation.ispartofseries | Softwaretechnik-Trends | |
| dc.subject | Components | |
| dc.subject | architecture | |
| dc.subject | performance | |
| dc.subject | metrics | |
| dc.title | An Architectural Template for Parallel Loops and Sections | en |
| dc.type | Text/Conference Paper | |
| gi.citation.endPage | 27 | |
| gi.citation.publisherPlace | Bonn | |
| gi.citation.startPage | 25 | |
| gi.conference.date | 8.-9. November 2018 | |
| gi.conference.location | Hildesheim | |
| gi.conference.sessiontitle | 9th Symposium on Software Performance (SSP 2018) |
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