Logo des Repositoriums
 

A SSE-Based Implementation of a Ray Tracer for the Comparision with Coprocessors in Hybrid Computing System

Kurzanzeige
dc.contributor.authorHampel, Volker
dc.contributor.authorMaehle, Erik
dc.date.accessioned2017-12-06T09:06:17Z
dc.date.available2017-12-06T09:06:17Z
dc.date.issued2011
dc.description.abstractIn this paper we present and discuss our efforts to accelerate a sample application by using the Streaming SIMD Extensions (SSE) to the x64 instruction set. Several approaches to their integration into the source code are tested and evaluated against each other. They are assembler intrinsics, the initial source code combined with different compiler flags, and enhanced code for better SSE inference. Their performances are compared to benchmarks from two hybrid computing systems, which use a Field Programmable Gate Array (FPGA) and a Graphics Processing Unit (GPU), respectively. As the interfaces to manipulated/accelerated code sections are the same in all cases, comparability always is maintained.en
dc.identifier.doi10.1007/BF03341992
dc.identifier.pissn0177-0454
dc.identifier.urihttps://dl.gi.de/handle/20.500.12116/8561
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V.
dc.relation.ispartofPARS: Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware: Vol. 28, No. 1
dc.relation.ispartofseriesPARS: Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware
dc.subjectGraphic Processing Unit
dc.subjectField Programmable Gate Array
dc.subjectCentral Processing Unit
dc.subjectData Flow Graph
dc.subjectCompiler Optimization
dc.titleA SSE-Based Implementation of a Ray Tracer for the Comparision with Coprocessors in Hybrid Computing Systemen
dc.typeText/Journal Article
gi.citation.endPage140
gi.citation.startPage131

Dateien

Originalbündel
1 - 1 von 1
Vorschaubild
Name:
40731_2014_Article_BF03341992.pdf
Größe:
170.35 KB
Format:
Adobe Portable Document Format
Herunterladen

Sammlungen

PARS-Mitteilungen 2011