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Reconfigurable OPTO-ASICs as base for future self-organizing CMOS cameras

dc.contributor.authorFey, Dietmar
dc.contributor.authorSchmidt, Daniel
dc.contributor.authorLoos, Andreas
dc.contributor.editorBrinkschulte, Uwe
dc.contributor.editorBecker, Jürgen
dc.contributor.editorFey, Dietmar
dc.contributor.editorGroßpietsch, Karl-Erwin
dc.contributor.editorHochberger, Christian
dc.contributor.editorMaehle, Erik
dc.contributor.editorRunkler, Thomas A.
dc.date.accessioned2019-10-30T11:53:40Z
dc.date.available2019-10-30T11:53:40Z
dc.date.issued2004
dc.description.abstractWe investigated different parallel SIMD (single instruction multiple data) architectures based on pure programmable and reconfigurable approaches for their appropriateness for integration in an one chip high speed CMOS (complementary metal-oxide semiconductor) camera. Our goal is to combine parallel signal detection and parallel signal processing in one chip. By a logic synthesis we show that a reconfigurable combinatorial circuit based on morphological operations is superior for our purpose. Further we describe briefly how a such system can be expanded towards a self-organizing system.en
dc.identifier.isbn3-88579-370-9
dc.identifier.pissn1617-5468
dc.identifier.urihttps://dl.gi.de/handle/20.500.12116/29380
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V.
dc.relation.ispartofARCS 2004 – Organic and pervasive computing
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-41
dc.titleReconfigurable OPTO-ASICs as base for future self-organizing CMOS camerasen
dc.typeText/Conference Paper
gi.citation.endPage304
gi.citation.publisherPlaceBonn
gi.citation.startPage297
gi.conference.dateMarch 26, 2004
gi.conference.locationAugsburg
gi.conference.sessiontitleRegular Research Papers

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