A Scalable Hardware Algorithm for Demanding Timer Management in Network Systems
dc.contributor.author | Septinus, K. | |
dc.contributor.author | Dragone, S. | |
dc.contributor.author | Langner, M. | |
dc.contributor.author | Blume, H. | |
dc.contributor.author | Pirsch, P. | |
dc.date.accessioned | 2017-12-06T09:06:20Z | |
dc.date.available | 2017-12-06T09:06:20Z | |
dc.date.issued | 2011 | |
dc.description.abstract | K. Septinus1 , S. Dragone2 , M. Langner1 , H. Blume1 , and P. Pirsch1 | en |
dc.identifier.doi | 10.1007/BF03341985 | |
dc.identifier.pissn | 0177-0454 | |
dc.identifier.uri | https://dl.gi.de/handle/20.500.12116/8594 | |
dc.language.iso | en | |
dc.publisher | Gesellschaft für Informatik e.V. | |
dc.relation.ispartof | PARS: Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware: Vol. 28, No. 1 | |
dc.relation.ispartofseries | PARS: Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware | |
dc.subject | Clock Cycle | |
dc.subject | External Memory | |
dc.subject | Time Entry | |
dc.subject | Memory Transfer | |
dc.subject | Heap Structure | |
dc.title | A Scalable Hardware Algorithm for Demanding Timer Management in Network Systems | en |
dc.type | Text/Journal Article | |
gi.citation.endPage | 67 | |
gi.citation.startPage | 58 |
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