Reliability Bottlenecks in Integrated Parallel Fault-Tolerant Systems
| dc.contributor.author | Fechner, Bernhard | |
| dc.date.accessioned | 2017-12-06T08:59:33Z | |
| dc.date.available | 2017-12-06T08:59:33Z | |
| dc.date.issued | 2012 | |
| dc.description.abstract | Bernhard Fechner, Department of Mathematics and Computer Science, Parallel Computing and VLSI Group, FernUniversität in Hagen, 58084 Hagen, Germany | en |
| dc.identifier.doi | 10.1007/BF03345458 | |
| dc.identifier.pissn | 0724-5319 | |
| dc.identifier.uri | https://dl.gi.de/handle/20.500.12116/8543 | |
| dc.language.iso | en | |
| dc.publisher | Gesellschaft für Informatik e.V. | |
| dc.relation.ispartof | FERS-Mitteilungen: Vol. 30, No. 1 | |
| dc.relation.ispartofseries | FERS-Mitteilungen | |
| dc.subject | Physical Layer | |
| dc.subject | Field Programmable Gate Array | |
| dc.subject | Fault Model | |
| dc.subject | Finite State Machine | |
| dc.subject | Transient Fault | |
| dc.title | Reliability Bottlenecks in Integrated Parallel Fault-Tolerant Systems | en |
| dc.type | Text/Journal Article | |
| gi.citation.endPage | 9 | |
| gi.citation.startPage | 4 |
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