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Self-checking carry-select adder with sum-bit duplication

dc.contributor.authorSogomonyan, E. S.
dc.contributor.authorMarienfeld, D.
dc.contributor.authorOcheretnij, V.
dc.contributor.authorGössel, M.
dc.contributor.editorBrinkschulte, Uwe
dc.contributor.editorBecker, Jürgen
dc.contributor.editorFey, Dietmar
dc.contributor.editorGroßpietsch, Karl-Erwin
dc.contributor.editorHochberger, Christian
dc.contributor.editorMaehle, Erik
dc.contributor.editorRunkler, Thomas A.
dc.date.accessioned2019-10-30T11:53:48Z
dc.date.available2019-10-30T11:53:48Z
dc.date.issued2004
dc.description.abstractIn this paper the first code-disjoint totally self-checking carry-select adder is proposed. The adder blocks are fast ripple adders with a single NAND-gate delay for carry-propagation per cell. In every adder block both the sum-bits and the corresponding inverted sum-bits are simultaneously implemented. The parity of the input operands is checked against the X OR-sum of the propagate signals. For 64 bits area and maximal delay are determined by the SYNOPSYS CAD tool of the EUROCHIP project. Compared to a 64 bit carry-select adder without error detection the delay of the most significant sum-bit does not increase. Compared to a completely duplicated code-disjoint carry-select adder we save 240 X OR-gates.en
dc.identifier.isbn3-88579-370-9
dc.identifier.pissn1617-5468
dc.identifier.urihttps://dl.gi.de/handle/20.500.12116/29399
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V.
dc.relation.ispartofARCS 2004 – Organic and pervasive computing
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-41
dc.titleSelf-checking carry-select adder with sum-bit duplicationen
dc.typeText/Conference Paper
gi.citation.endPage91
gi.citation.publisherPlaceBonn
gi.citation.startPage84
gi.conference.dateMarch 26, 2004
gi.conference.locationAugsburg
gi.conference.sessiontitleRegular Research Papers

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