Correction of faulty signal transmission for resilient designs of signed-digit arithmetic
dc.contributor.author | Neuhäuser, David | |
dc.contributor.author | Zehendner, Eberhard | |
dc.contributor.editor | Mühl, Gero | |
dc.contributor.editor | Richling, Jan | |
dc.contributor.editor | Herkersdorf, Andreas | |
dc.date.accessioned | 2019-10-30T12:50:12Z | |
dc.date.available | 2019-10-30T12:50:12Z | |
dc.date.issued | 2012 | |
dc.description.abstract | When arithmetic components are parallelized, fault-prone interconnections can tamper results significantly. Advances in feature size shrinking lead to a steady increase of errors caused by faulty transmission. We suggest to employ resilient data encoding schemes to offset these negative effects. Focusing on parallel signed-digit based arithmetic, frequently used in high-speed systems, we found that a suitable data encoding can reduce error rates by about 25% when using 2-bit encoding and about 62% when using 3-bit encoding. Data encoding should be driven by symbol occurrence probabilities. We develop a methodology to obtain these probabilities, show example fault-tolerant encodings, and discuss the impact on communicating parallel arithmetic circuits in example error scenarios. | en |
dc.identifier.isbn | 978-3-88579-294-9 | |
dc.identifier.pissn | 1617-5468 | |
dc.identifier.uri | https://dl.gi.de/handle/20.500.12116/29493 | |
dc.language.iso | en | |
dc.publisher | Gesellschaft für Informatik e.V. | |
dc.relation.ispartof | ARCS 2012 Workshops | |
dc.relation.ispartofseries | Lecture Notes in Informatics (LNI) - Proceedings, Volume P-200 | |
dc.title | Correction of faulty signal transmission for resilient designs of signed-digit arithmetic | en |
dc.type | Text/Conference Paper | |
gi.citation.endPage | 220 | |
gi.citation.publisherPlace | Bonn | |
gi.citation.startPage | 211 | |
gi.conference.date | 28. Februar-2. März 2012 | |
gi.conference.location | München | |
gi.conference.sessiontitle | Regular Research Papers |
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