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A process model for hardware modules in reconfigurable system-on-chip

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dc.contributor.authorBergmann, Neil W.
dc.contributor.authorWilliams, John A.
dc.contributor.authorHan, Jie
dc.contributor.authorChen, Yi
dc.contributor.editorKarl, Wolfgang
dc.contributor.editorBecker, Jürgen
dc.contributor.editorGroßpietsch, Karl-Erwin
dc.contributor.editorHochberger, Christian
dc.contributor.editorMaehle, Erik
dc.date.accessioned2019-10-30T12:17:23Z
dc.date.available2019-10-30T12:17:23Z
dc.date.issued2006
dc.identifier.isbn3-88579-175-7
dc.identifier.pissn1617-5468
dc.identifier.urihttps://dl.gi.de/handle/20.500.12116/29416
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V.
dc.relation.ispartofARCS'06, 19th International Conference on Architecture of Computing Systems
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-81
dc.titleA process model for hardware modules in reconfigurable system-on-chipen
dc.typeText/Conference Paper
gi.citation.endPage214
gi.citation.publisherPlaceBonn
gi.citation.startPage205
gi.conference.dateMarch 16, 2006
gi.conference.locationFrankfurt am Main
gi.conference.sessiontitleRegular Research Papers

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P081 - ARCS 2006 - 19th International Conference on Architecture of Computing Systems