A compiler-friendly and low-power DSP architecture

Matúš, E.Cichon, G.Seidel, H.Robelly, P.Limberg, T.Fettweis, G.Cremers, Armin B.Manthey, RainerMartini, PeterSteinhage, Volker2019-10-112019-10-1120053-88579-396-2https://dl.gi.de/handle/20.500.12116/27983enA compiler-friendly and low-power DSP architectureText/Conference Paper1617-5468