Fechner, Bernhard2017-12-062017-12-062012https://dl.gi.de/handle/20.500.12116/8543Bernhard Fechner, Department of Mathematics and Computer Science, Parallel Computing and VLSI Group, FernUniversität in Hagen, 58084 Hagen, GermanyenPhysical LayerField Programmable Gate ArrayFault ModelFinite State MachineTransient FaultReliability Bottlenecks in Integrated Parallel Fault-Tolerant SystemsText/Journal Article10.1007/BF033454580724-5319