Sogomonyan, E. S.Marienfeld, D.Ocheretnij, V.Gössel, M.Brinkschulte, UweBecker, JürgenFey, DietmarGroßpietsch, Karl-ErwinHochberger, ChristianMaehle, ErikRunkler, Thomas A.2019-10-302019-10-3020043-88579-370-9https://dl.gi.de/handle/20.500.12116/29399In this paper the first code-disjoint totally self-checking carry-select adder is proposed. The adder blocks are fast ripple adders with a single NAND-gate delay for carry-propagation per cell. In every adder block both the sum-bits and the corresponding inverted sum-bits are simultaneously implemented. The parity of the input operands is checked against the X OR-sum of the propagate signals. For 64 bits area and maximal delay are determined by the SYNOPSYS CAD tool of the EUROCHIP project. Compared to a 64 bit carry-select adder without error detection the delay of the most significant sum-bit does not increase. Compared to a completely duplicated code-disjoint carry-select adder we save 240 X OR-gates.enText/Conference Paper1617-5468