Stechele, WalterHerrmann, StephanHerkersdorf, AndreasBrinkschulte, UweBecker, JürgenFey, DietmarGroßpietsch, Karl-ErwinHochberger, ChristianMaehle, ErikRunkler, Thomas A.2019-10-302019-10-3020043-88579-370-9https://dl.gi.de/handle/20.500.12116/29370This paper reports ongoing work towards a dynamically reconfigurable System-on-Chip (SoC) platform for video signal processing. It consists of dedicated, statically and dynamically reconfigurable components, as well as an embedded RISC core and memory. Application-specific software libraries support control of dynamic reconfiguration of low level operations by high level instructions. Thus programmability is combined with high data throughput and low power consumption of hardwired circuits. Preliminary work presented here is focused on one selected application, video object segmentation. The architecture of a coprocessor for video object segmentation is presented, which exploits the basic concept of the dynamically reconfigurable SoC platform. A library of software functions for image processing was developed, too, which will be used as a starting point for the application-specific software parts of the platform.enDynamically reconfigurable architecturesvideo object segmentationTowards a dynamically reconfigurable system-on-chip platform for video signal processingText/Conference Paper1617-5468