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Timing-accurate simulation framework for NVM-based compute-in-memory architecture exploration

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2023

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De Gruyter

Zusammenfassung

Data-intensive applications have a huge demand on processor-memory communication. To reduce the amount of data transfers and their associated latency and energy, Compute-in-Memory (CIM) architectures can be used to perform operations ranging from simple binary operations to more complex operations such as additions and matrix-vector multiplications directly within the memory. However, proper adjustments to the memory hierarchy are needed to enable the execution of CIM operations. To evaluate the trade-off between the usage of different emerging non-volatile memories for CIM and conventional computing architectures, this work extends the widely used gem5 simulation framework with an extensible timing-aware main memory CIM simulation capability. This framework is used to analyze the performance of CIM extended main memory with various emerging memory technologies, namely Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM), Redox-based RAM (ReRAM) and Phase-Change Memory (PCM). We evaluate different workloads from the PolyBench/C benchmark suite and other selected examples. In comparison to a processor-centric system, the results show a significant reduction in execution time for the majority of applications.

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Rietz, Vincent; Münch, Christopher; Mayahinia, Mahta; Tahoori, Mehdi (2023): Timing-accurate simulation framework for NVM-based compute-in-memory architecture exploration. it - Information Technology: Vol. 65, No. 1-2. DOI: 10.1515/itit-2023-0019. Berlin: De Gruyter. PISSN: 2196-7032. pp. 13-29. Article

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