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D-extended Petri nets for simulating of digital devices

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dc.contributor.authorVeselov, A. A.
dc.contributor.editorDesel, Jörg
dc.contributor.editorWeske, Mathias
dc.date.accessioned2019-11-14T12:47:27Z
dc.date.available2019-11-14T12:47:27Z
dc.date.issued2002
dc.description.abstractThe paper presents D-extended Petri nets, a specific variant of Place/transition nets with inhibitor arcs that are structurally restricted in a way that implies safety. This class of nets is shown to be able to represent basic boolean functions as NOT, NAND, NOR and to build elementary flip flops like TT. A notion of time is added in a way, that handles conflicts among enabled transitions by a non-deterministic selection of one transition to fire and disabling others. Enabling times are not memorized, so the next time the discriminated transition becomes enabled again, it must wait the whole duration before it can fire. The paper proposes the use of the presented class of Petri nets in the design of digital circuits.en
dc.identifier.isbn3-88579-350-4
dc.identifier.pissn1617-5468
dc.identifier.urihttps://dl.gi.de/handle/20.500.12116/30160
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V.
dc.relation.ispartofPromise 2002 – Prozessorientierte Methoden und Werkzeuge für die Entwicklung von Informationssystemen
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-21
dc.subjectDigital circuits
dc.subjecttypical structures of models
dc.subjectcombinatorial and consequent logic
dc.subjectthe models of functional elements of digital devices
dc.titleD-extended Petri nets for simulating of digital devicesen
dc.typeText/Conference Paper
gi.citation.endPage127
gi.citation.publisherPlaceBonn
gi.citation.startPage116
gi.conference.date9.-11. Oktober 2002
gi.conference.locationPotsdam
gi.conference.sessiontitleRegular Research Papers

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