Hybrid Parallel Sort on the Cell Processor
| dc.contributor.author | Keller, Jörg | |
| dc.contributor.author | Kessler, Christoph | |
| dc.contributor.author | König, Kalle | |
| dc.contributor.author | Heenes, Wolfgang | |
| dc.contributor.editor | Nagel, Wolfgang E. | |
| dc.contributor.editor | Hoffmann, Rolf | |
| dc.contributor.editor | Koch, Andreas | |
| dc.date.accessioned | 2019-05-06T10:35:46Z | |
| dc.date.available | 2019-05-06T10:35:46Z | |
| dc.date.issued | 2008 | |
| dc.description.abstract | Sorting large data sets has always been an important application, and hence has been one of the benchmark applications on new parallel architectures. We present a parallel sorting algorithm for the Cell processor that combines elements of bitonic sort and merge sort, and reduces the bandwidth to main memory by pipelining. We present runtime results of a partial prototype implementation and simulation results for the complete sorting algorithm, that promise performance advantages over previ- ous implementations. | en |
| dc.identifier.isbn | 978-3-88579-218-5 | |
| dc.identifier.pissn | 1617-5468 | |
| dc.identifier.uri | https://dl.gi.de/handle/20.500.12116/22269 | |
| dc.language.iso | en | |
| dc.publisher | Gesellschaft für Informatik e. V. | |
| dc.relation.ispartof | 9th workshop on parallel systems and algorithms – workshop of the GI/ITG special interest groups PARS and PARVA | |
| dc.relation.ispartofseries | Lecture Notes in Informatics (LNI) - Proceedings, Volume P-124 | |
| dc.subject | Parallel Sort | |
| dc.subject | Merge Sort | |
| dc.subject | Cell Processor | |
| dc.subject | Hybrid Sort | |
| dc.title | Hybrid Parallel Sort on the Cell Processor | en |
| dc.type | Text/Conference Paper | |
| gi.citation.endPage | 112 | |
| gi.citation.publisherPlace | Bonn | |
| gi.citation.startPage | 107 | |
| gi.conference.date | February 26th, 2008 | |
| gi.conference.location | Dresden | |
| gi.conference.sessiontitle | Regular Research Papers |
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