Petri Net Analysis of Non-Redundant and Redundant Execution Schemes
dc.contributor.author | Einer, Stefan | |
dc.contributor.author | Fechner, Bernhard | |
dc.contributor.author | Keller, Jörg | |
dc.date.accessioned | 2017-12-06T08:58:48Z | |
dc.date.available | 2017-12-06T08:58:48Z | |
dc.date.issued | 2010 | |
dc.description.abstract | Stefan Einer, Schweizerische Bundesbahnen, 3000 Bern, Switzerland, stefan.einer@sbb.ch Bernhard Fechner, FernUniversität in Hagen, 58084 Hagen, Germany, bernhard.fechner@fernuni-hagen.de Jörg Keller, FernUniversität in Hagen, 58084 Hagen, Germany, joerg.keller@fernuni-hagen.de | en |
dc.identifier.doi | 10.1007/BF03345446 | |
dc.identifier.pissn | 0724-5319 | |
dc.identifier.uri | https://dl.gi.de/handle/20.500.12116/8523 | |
dc.language.iso | en | |
dc.publisher | Gesellschaft für Informatik e.V. | |
dc.relation.ispartof | FERS-Mitteilungen: Vol. 28, No. 1 | |
dc.relation.ispartofseries | FERS-Mitteilungen | |
dc.subject | Schedule Algorithm | |
dc.subject | Data Cache | |
dc.subject | Instruction Schedule | |
dc.subject | Conditional Branch | |
dc.subject | Processor Performance | |
dc.title | Petri Net Analysis of Non-Redundant and Redundant Execution Schemes | en |
dc.type | Text/Journal Article | |
gi.citation.endPage | 64 | |
gi.citation.startPage | 61 |
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